Recently, a semiconductor has been miniaturized and multi-layered, and the logic has been also complicated, and thus it is extremely difficult to manufacture the semiconductor. As a result thereof, a defect due to a manufacturing process tends to be increased, and thus it is important to accurately inspect such a defect. A review SEM and a CD-SEM is used for specifically inspecting and measuring such a defect. These SEMs inspect or measure target coordinates based on optical simulation, and a circuit pattern corresponding to target coordinates based on an inspection result of an optical inspection device. As an inspection or measurement method, various methods have been proposed, and in particular, in a manufacturing process of a semiconductor after 65 nm, a method of detecting the defect by comparing the shape with a reference pattern (PTL 1 and PTL 2) has been used in order to accurately grasp a state of the defect due to an optical proximity effect.
The comparison of the shape with the reference pattern is performed by the following procedure. First, an operator defines a circuit pattern having a preferred shape as a reference pattern. As the reference pattern, a golden pattern or the like which is selected by an inspection operator from a circuit pattern generated by simulating design data or a circuit pattern to be actually manufactured and a manufactured circuit pattern is used. Next, the circuit pattern is extracted from a captured image by using edge detection processing or the like. Next, the reference pattern and the circuit pattern are superposed. The superposition is manually adjusted or automatically adjusted by pattern matching. The shape of the circuit pattern is deformed into various shapes according to manufacturing conditions of the semiconductor or a circuit layout. In PTL 2, for this reason, in order to accurately grasp the degree of deformation, a measurement region is set in a two-dimensional region including inspection coordinates, and a distance between the reference pattern included in the measurement region and the edge of the circuit pattern is cyclopaedically measured at predetermined intervals. Next, a plurality of measurement values obtained from the measurement region are averaged, the result thereof is set to the measurement value of the measurement region, the normality or the defect of the circuit pattern is determined by a comparison with respect to a predetermined threshold value, and the circuit pattern including the defect is subjected to a process of circuit design and mask correction.